Liliana Andrade - Multi-Processor System-on-Chip 2

6 Chapter 6Figure 6.1. The anatomy of a desktop in the 1980sFigure 6.2. The anatomy of a modern dual-socket server bladeFigure 6.3. Chip organization in an x86-based CPU (left) and a custom many-core ...Figure 6.4. Speedup of near-memory processing: many-core OoO CPU and Mondrian wi...

7 Chapter 7Figure 7.1. Overview on the operation of VPSimFigure 7.2. Simplistic implementation of the PL011 UART in PythonFigure 7.3. System validation flow using the hybrid prototyping solutionFigure 7.4. Synchronization mechanism between VPSim and FPGA in TLM R/WFigure 7.5. Communication scheme in VPSim during co-simulation and co-emulationFigure 7.6. Example of FmiValue declarationFigure 7.7. Structure of the generated virtual platform FMUFigure 7.8. Parallel implementation of the virtual platform FMU

8 Chapter 8Figure 8.1. The top 20 of the TOP500 and GREEN500 supercomputers (left) and the ...Figure 8.2. The three axes of FFT parallelism (left) and various machine rooflin...Figure 8.3. Homogeneous flow graph Gcomprising seven nodes and seven edgesFigure 8.4. Flow graph G(top), its state after three cycles (mid), its flow (ev...Figure 8.5. Graph Glorenz(top), its flow during the first eight cycles (left) a...Figure 8.6. Definition graph GlorenzFigure 8.7. Definition of graph GMAFigure 8.8. Node macomputes the moving average over a window N = 11 samples. Th...Figure 8.9. An example of an FSM for a cyclo-static dataflow nodeFigure 8.10. Subgraph RO(left, top) comprises three CSDF nodes ro[i]and perfor...Figure 8.11. SWITCH and SELECT nodes as used in Boolean DataflowFigure 8.12. Recursive dataflow graph Sort.64(top), Sort.64connected to a rand...Figure 8.13. Definition of node class SplitFigure 8.14. Definition of node class IMGFigure 8.15. A toy processor farm: dataflow graph (top), flow plot (left) and da...Figure 8.16. Dataflow graph Sobelwith I/O to RAMnode ram(top), 50μsec flow pl...Figure 8.17. Three tricycle dataflow graphs. Node execution times equal 1Figure 8.18. A dataflow pipeline with four different back-pressure schemes. Node...Figure 8.19. A six-node pipeline starts with all nodes running self-timed with t...Figure 8.20. Verilog template for a StaccatoLab node, including input edges

9 Chapter 9Figure 9.1. Visible and infrared images and associated classification from the C...Figure 9.2. The TI MVPFigure 9.3. The Trimedia TM-1Figure 9.4. Motion compensation acceleratorFigure 9.5. The Philips Viper

10 Chapter 10Figure 10.1. Mobile data traffic in western Europe from 2006 to 2021 (2019-2021 ...Figure 10.2. SOC consumer portable design trends (adapted from International Tec...Figure 10.3. Programming flow. (a) Uni-processor: compilers perform an end-to-en...Figure 10.4. a) Example of an SDF graph. Actors have fixed consumption and produ...Figure 10.5. CPN example code: channel declarationFigure 10.6. CPN example code: KPN process template (run-length decoding)Figure 10.7. CPN example code: SDF process template (adder)Figure 10.8. CPN example code: process instantiationFigure 10.9. Types of parallelism: (a) DLP, (b) TLP and (c) PLP (DS stands for d...Figure 10.10. CPN example code: DLPFigure 10.11. CPN example code: TLPFigure 10.12. CPN example code: PLPFigure 10.13. Evolution of compiler development versus architecture developmentFigure 10.14. (a) Structure of the source-to-source compiler cpn-cc. (b) An exam...Figure 10.15. Illustration of process traces. Example process network with a sam...Figure 10.16. Overview of the mapping flowFigure 10.17. (a) OMAP3530 block diagram. (b) Overview of TI OMAP softwareFigure 10.18. TI C6678 block diagramFigure 10.19. A complete compilation framework for OMAP3530 using MAPSFigure 10.20. Benchmark: digital audio filterFigure 10.21. Results of the audio filter (the percentage indicates the reductio...Figure 10.22. Benchmark: radar applicationFigure 10.23. Mapping results of the radar application: improved version. (a) Pr...Figure 10.24. Results of the radar applications: performance. (a) Initial versio...

1 Cover

2 Table of Contents

3 Title Page SCIENCES Electronics Engineering , Field Director – Francis Balestra Design Methodologies and Architecture , Subject Head – Ahmed Jerraya

4 Copyright First published 2020 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc. Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address: ISTE Ltd 27-37 St George’s Road London SW19 4EU UK www.iste.co.uk John Wiley & Sons, Inc. 111 River Street Hoboken, NJ 07030 USA www.wiley.com © ISTE Ltd 2020 The rights of Liliana Andrade and Frédéric Rousseau to be identified as the authors of this work have been asserted by them in accordance with the Copyright, Designs and Patents Act 1988. Library of Congress Control Number: 2020940076 British Library Cataloguing-in-Publication Data A CIP record for this book is available from the British Library ISBN 978-1-78945-022-4 ERC code: PE6 Computer Science and Informatics PE6_1 Computer architecture, pervasive computing, ubiquitous computing PE6_10 Web and information systems, database systems, information retrieval and digital libraries, data fusion PE7 Systems and Communication Engineering PE7_2 Electrical engineering: power components and/or systems

5 Foreword

6 Acknowledgments

7 Begin Reading

8 List of Authors

9 Author Biographies

10 Index

11 End User License Agreement

1 v

2 ii

3 iii

4 xi

5 xii

6 xiii

7 1

8 3

9 4

10 5

11 6

12 7

13 8

14 9

15 10

16 11

17 12

18 13

19 14

20 15

21 16

22 17

23 18

24 19

25 20

26 21

27 22

28 23

29 24

30 25

31 26

32 27

33 28

34 29

35 30

36 31

37 33

38 34

39 35

40 36

41 37

42 38

43 39

44 40

45 41

46 42

47 43

48 44

49 45

50 47

51 49

52 50

53 51

54 52

55 53

56 54

57 55

58 56

59 57

60 58

61 59

62 60

63 61

64 62

65 63

66 64

67 65

68 66

69 67

70 68

71 69

72 70

73 71

74 72

75 73

76 74

77 75

78 76

79 77

80 78

81 79

82 80

83 81

84 82

85 83

86 84

87 85

88 86

89 87

90 88

91 89

92 90

93 91

94 92

95 93

96 94

97 95

98 96

99 97

100 98

101 99

102 100

103 101

104 102

105 103

106 104

107 105

108 106

109 107

110 108

111 109

112 110

113 111

114 112

115 113

116 114

117 115

118 116

119 117

120 118

121 119

122 120

123 121

124 123

125 124

126 125

127 126

128 127

129 128

130 129

131 130

132 131

133 132

134 133

135 134

136 135

137 137

138 138

139 139

140 140

141 141

142 142