Anand K. Verma - Introduction To Modern Planar Transmission Lines

The port voltage is related to the port current through the [Z]‐matrix:

(3.2.8)

where [I] is a unit or identity matrix. Keeping in view the definition of the [S] matrix, the following relations, between the [S] matrix and [Z] matrix, are obtained:

(3.2.9)

Similarly, the following expressions, relating [S] and [Y]‐parameters are obtained:

(3.2.10)

Figure (3.19)shows a 2‐port network. The known [ABCD] parameters of the network are to be converted to the [S] parameters. The voltage pair , and are the incident voltage and reflected voltage at both port‐1 and port‐2. Figure (3.19)also shows the total port voltage (V 1, V 2) and total port current (I 1, I 2). The port currents, at both the ports, enter into the network. Therefore, the current I 2is negative. The input port voltage and port current are related to the output port voltage and port current through the [ABCD] parameters as follows:

(3.2.11)

The port voltage and current are a linear combination of the incident and reflected voltages and currents:

(3.2.12)

Figure 3.19 Network for [ABCD] parameter.

On substituting equation (3.2.11)in equation (3.2.12):

(3.2.13)

To define the [S] parameters, port‐2 is terminated in the reference impedance Z 0giving , i.e. the reflection from the matched terminated load is zero. The voltage is the incident wave on the load (Z L= Z 0), whereas the voltage is the reflected wave from the load. The above equations are reduced to the following expressions:

(3.2.14)

On adding the above equations, the following expression is obtained:

(3.2.15)

Equation (3.2.15)provides the transmission coefficient S 21, defined as follows:

(3.2.16)

The following expression is obtained from equation (3.2.14):

(3.2.17)

Equation (3.2.17)gives the following reflection coefficient S 11at the port‐1, while port‐2 is terminated in the matched load Z 0:

(3.2.18)

Similarly, the following expressions are obtained from equation (3.2.13), where the port‐1 is terminated in the matched load Z 0, i.e. :

(3.2.19)

On eliminating the S 22is obtained, whereas S 12is obtained eliminating :

(3.2.20)

If the network is reciprocal, AD − BC = 1, i.e. S 12= S 21. For the symmetrical network, S 11= S 22leading to A = D. The known [S] parameters can also be converted to the [A, B, C, D] parameters. Similarly, the [Z], [Y], [ABCD] and [S] parameters are also converted among themselves [B.1, B.3, B.5].

A transmission line section could be treated as a device and its performance can be evaluated by using a VNA. The device is connected to the VNA through connecting cables and connectors. The S‐parameters of a device is measured at the external circuit ports that include the effect of the cables and connectors on the S‐parameters of the device. Thus, the true S‐parameter of a device is embedded in the measured S‐parameters of the device. However, it is desired to obtain the true S‐parameters of the device under test (DUT). The line section could be the DUT. The process of extracting the S‐parameters of the device at the internal device ports (1 in, 2 in), from the measured S‐parameters, at the external circuit ports (1 ex, 2 ex) is known as the de‐embedding process. It is achieved through a calibration process in which the S‐parameters of two error boxes are quantified. The error box represents errors in the S‐parameters due to cables and connectors connecting the device to the external circuit ports [B.1]. The S or [ABCD] parameter representation of the device at internal ports (1 in, 2 in) along with the error boxes is shown in Fig (3.20a). The location of the measurement ports, i.e. the external ports (1 ex, 2 ex) and the device internal ports (1 in, 2 in), are further shown in Fig (3.20b).