Ernst Lueder - Liquid Crystal Displays

7 Chapter 8Figure 8.1 Position of a molecule on a cone in each layerFigure 8.2 The helix in a layered structure of chiral smectic C* liquid crystalFigure 8.3 Textures of LC molecules between the substrates of an FLC cellFigure 8.4 (a) The black and (b) the white state associated with the two stable states of an FLCFigure 8.5 Various textures of SSFLCDs with pretilt α and layer tilt δ c. The angles in brackets [ ] are shown as projections in the drawing planeFigure 8.6 The angles in the Chevron texturesFigure 8.7 The dependency of layer tilt δ con the pretilt α in SSFLCDs with the quasi-bookshelf and Chevron texturesFigure 8.8 The cone with the two stable positions of the molecules rotated by angle δ cfrom the plane of the polarizers: (a) Isometric view, (b) side viewFigure 8.9 The effective switching angle β eff( α ) with δ c( α ) in Figure 8.7Figure 8.10 The planar texture chiral nematic displays with the axes of the helixes normal to the glass platesFigure 8.11 Homeotropically aligned molecules and the fingerprint texture of chiral nematic displaysFigure 8.12 The focal conic texture of SSCTDs without and for PSCTDs with the polymer networkFigure 8.13 The spectra of reflected light R and of scattered light S in an SSCTDFigure 8.14 Isocontrast curves of a reflective SSCT displayFigure 8.15 Three (resp. two) stacked reflective chiral nematic displays for the generation of coloursFigure 8.16 Transmittance versus voltage of an inverse mode chiral nematic displayFigure 8.17 The three stable states of a nematic cell with 0°, 360° and 180° twistsFigure 8.18 Grating and alignment of a zenithal bistable deviceFigure 8.19 Switching of the twisted zenithal bistable deviceFigure 8.20 Switching of the monostably anchored device from stable state (a) to stable state (d)

8 Chapter 9Figure 9.1 The deformed helix ferroelectric LCDFigure 9.2 Variation of the director twist φ dependent on the reduced location z′ on the helix and on the field + E and − E Figure 9.3 The texture of the antiferroelectric and of the ferroelectric LC materialFigure 9.4 The switching characteristics of antiferroelectric LCDs, (a) tilt angle Θ ( E ); (b) transmittance T ( E ); (c) the textures depending on E Figure 9.5 The V-shaped switching curve of antiferroelectric LCDs

9 Chapter 10Figure 10.1 The direct addressing of the seven segments of a digitFigure 10.2 The Passive Matrix LCD (PMLCD) with row and column electrodesFigure 10.3 The Active Matrix addressed LCD (AMLCD) with a TFT as pixel switch

10 Chapter 11Figure 11.1 The voltage for a directly addressed LCDFigure 11.2 The waveforms for V c, V s and V p of a direct addressed LCDFigure 11.3 The reconfigured addressing of the display in Figure 10.1 into a matrix addressing with only 10 external connections

11 Chapter 12Figure 12.1 A display with 3 × 2 pixels with the desired video information, white and blackFigure 12.2 (a) Waveforms V r1, V r2, V r3in rows 1, 2 and 3; (b) waveforms V c1and V c2in column 1 and 2; (c) waveforms at pixels in row 1/column 1 and row 2/column 2Figure 12.3 The selection ratio V on /V offin Equation (12.21) as a function of the number N of rowsFigure 12.4 The reversal of polarity for row and column voltages in the addressing scheme without and with offsetFigure 12.5 The generation of the voltage needed for a column driverFigure 12.6 The circuit of a column driver for PM addressingFigure 12.7 A superframe of four frames for the generation of five grey shadesFigure 12.8 Pulse Width Modulation of the signal voltage V cfor the generation of grey shadesFigure 12.9 The various matrix architectures for PM-addressed LCDs: (a) and (b) depict modifications of the basic architecture; (c), (d) and (e) show modifications of the dual scan schemeFigure 12.10 The phenomenon of ‘frame response’ in fast LCDsFigure 12.11 The Walsh functions of order 1 to 32Figure 12.12 The row voltage S in Equation (12.43) and the column voltage G maxin Equation (12.46) for N = 256 as a function of L < N rows addressed at a timeFigure 12.13 Probability for column voltage levels as a function of column voltage for L = 4, 32, 256 rows addressed at a timeFigure 12.14 Waveform of a column voltage with 256 time intervals and 32 lines selected at a timeFigure 12.15 Block diagram for row and column drivers of an MLA-LCDFigure 12.16 The decreased levels of row and column voltages for PM addressingFigure 12.17 The reduced transmission at the pixel voltage V th, V satand V on> V satfor N′ < N Figure 12.18 Dependence of contrast on frame frequency and on the number L of lines addressed at a timeFigure 12.19 Generation of full-interval PHM grey shades for a single row at a time addressed LCDFigure 12.20 Generation of full-interval PHM grey shade in an MLA-LCDFigure 12.21 Hardware for the generation of row and column voltages for pulse height modulated displaysFigure 12.22 The generation of column voltages including the virtual row by correlation for PHM displaysFigure 12.23 Change of the dielectric constants ε ||and ε ┴with frequencyFigure 12.24 The high-frequency voltage versus the low-frequency voltage for a 10 percent and a 90 percent optic transmission in a two frequency driving scheme

12 Chapter 13Figure 13.1 The hysteresis of the electro-optic response of an FLCD with intensity I versus pulse area A Figure 13.2 Switching thresholds of pulse duration τ thversus pulse amplitude V thof FLCDsFigure 13.3 The addressing of FLCDs with the V − τ minschemeFigure 13.4 The addressing of FLCDs with the Harada scheme with (a) two time slots and (b) four time slots per pixel informationFigure 13.5 The addressing of FLCDs with a time slot schemeFigure 13.6 The depolarization field E depand the ionic field E ionduring switching of an FLCDFigure 13.7 Contrast versus duration of addressing impulse as switching window for (a) low P sFLCDs and (b) higher P sFLCDsFigure 13.8 The reflectivity of a cholesteric display versus the applied pixel voltage (a) if the voltage is maintained at the pixel, and (b) if the voltage is applied and then switched offFigure 13.9 Reflectivity and pixel voltage of a cholesteric display versus switching timeFigure 13.10 An example for passive matrix addressing of a cholesteric displayFigure 13.11 The five-phase drive scheme for cholesteric displaysFigure 13.12 The switching of chiral nematic displays with five phases in the drive scheme, p : preparation phase; pp : post-preparation phase; s : selection phase; ps : post-selection phase; e : evolution phase; pe : post-evolution (only relaxation, no action needed)

13 Chapter 14Figure 14.1 (a) The symbol for a TFT; (b) cross-section of a bottom-gate TFT; (c) cross-section of a top-gate TFTFigure 14.2 (a) Output characteristics of a TFT; (b) input characteristics of a TFT; (c) input characteristics of a TFT with the ordinateFigure 14.3 Measured (full line) and ideal (dashed line) input characteristics of a TFT with logarithmic ordinateFigure 14.4 The TFT and its environment in a pixel for charging of C LC(a) to a positive voltage and (b) to a negative voltageFigure 14.5 The gate impulses and their effect on the pixel voltage V pFigure 14.6 The TFT addressing with a compensation impulseFigure 14.7 The TFT in a pixel with voltages, currents and parasitic capacitancesFigure 14.8 Gate pulses for diminished crosstalk (a) with trapezoidal and (b) with rounded wave formFigure 14.9 The voltage-dependent capacitance of liquid crystalsFigure 14.10 The measured logarithmic input characteristics of an a-Si-TFT with the off-currentsFigure 14.11 The shift of V thduring bias temperature stress testsFigure 14.12 Example for one stage of a shift register for the rows of an AMLCDFigure 14.13 A video driver of an AMLCDFigure 14.14 Block diagram for block parallel video drivers for an AMLCDFigure 14.15 Addressing of an AMLCD with half the number of video driversFigure 14.16 Recycling of charge by closing the switches by the control signal CRFigure 14.17 (a) Blocks of pixels with the same sign of the voltage V LC; (b) addressing of a line during two row address times. Reproduced from Nishimura et al., 1998 with permission of John Wiley & Sons.Figure 14.18 Introduction of a second line with the same information as the previous lineFigure 14.19 The introduction of an additional line if the capacitor C sin Figure 14.18 is connected to the gate lineFigure 14.20 The introduction of an additional dot in an LCDFigure 14.21 (a) The entire addressing system; (b) γ -correctionFigure 14.22 (a) Basic pixel layout of an AMLCD; (b) pixel layout with storage capacitor along the edges of the ITO-electrode; (c) cross-section along the line A–A′ in Figure 14.22(b)Figure 14.23 Cross-section of a pixel with an additional black matrix on the active matrix plateFigure 14.24 Pixel with the storage capacitor underneath the pixel electrodeFigure 14.25 A pixel with C sunderneath the ITO electrodeFigure 14.26 (a) The top view of a pixel in a reflective display with a mirror, which also covers the rows and columns; (b) cross-section of the pixel in Figure 14.26(a)Figure 14.27 The process steps for a four-mask fabrication of a-Si:H TFTsFigure 14.28 A two-mask fabrication of a-Si: H TFTsFigure 14.29 (a) The ion-implantation of an a-Si: H TFT and (b) the completed a-Si:H TFTFigure 14.30 Cross section of an a-Si:H TFT with a copper gateFigure 14.31 The basic addressing circuit. This figure was reproduced from Lueder, E., SID 05 Seminar , p. M-5/2 with permission by The Society for Information DisplayFigure 14.32 (a) The overshoot driving and (b) the undershoot driving; dashed lines without overshoot or undershoot. This figure was reproduced from Lueder, E., SID 05 Seminar , p. M-5/2 with permission by The Society for Information DisplayFigure 14.33 The subsaturation mode of a TFT. This figure was reproduced from Lueder, E., SID 05 Seminar , p. M-5/3 with permission by The Society for Information DisplayFigure 14.34 Overdrive for V LCwith deviations in the circuit parameters. This figure was reproduced from Lueder, E., SID 05 Seminar , p. M-5/6 with permission by The Society for Information DisplayFigure 14.35 The capacitance C LCand its charge Q as a function of V LCFigure 14.36 The block diagram for the dynamic capacitance compensation (DCC). This figure was reproduced from Lee, B. W. et al., SID 01 , p. 1261 with permission by The Society for Information DisplayFigure 14.37 Determination of V 1nfrom a given luminance L 0and from the previous frame value C LC,n − 1and a family of C LC= Q / V LChyperbolas with Q -values as parameters. This figure was reproduced from Lueder, E., SID 05 Seminar , p.M-5/9 with permission by The Society for Information DisplayFigure 14.38 Determination of V 1nfrom a given luminance L 0, the Q = C LC V LCcurve and a family of straight lines for the charges C LC,n − 1 V LCwith the inclination C LC,n − 1as parameters. This figure was reproduced from Lueder, E., SID 05 Seminar , p.M-5/9 with permission by The Society for Information DisplayFigure 14.39 The addressing waveform with a voltage pulse providing a boost of torque. This figure was reproduced from Lueder, E., Workshop Asia Display/IMID 04 , p. 65 with permission by The Society for Information DisplayFigure 14.40 The addressing waveform for imposing a small pretilt in the previous frame. This figure was reproduced from Song, J. K. et al., SID04 , p. 1346with permission by The Society for Information DisplayFigure 14.41 The turn-off and the turn-on time dependent on the voltage for the black stateFigure 14.42 Block diagram for the processing of the DCCII addressing method. This figure was reproduced from Song, J. K. et al., SID 04 , p. 1346 with permission by The Society for Information DisplayFigure 14.43 The transient to the on-stage for various PVA based cells. This figure was reproduced from Song, J. K. et al., SID 04 , p. 1346 with permission by The Society for Information DisplayFigure 14.44 Plot for intergrey response times of PVA with pretilt and overshoot (DCCII). This figure was reproduced from Song, J. K. et al., SID 04 , p. 1346/7 with permission by The Society for Information DisplayFigure 14.45 (a) Cross-section and (b) top view of the CFFS cell. This figure was reproduced from Li, Y. et al., JSID 08 , p. 1070 with permission by the Journal of the Society for Information DisplayFigure 14.46 (a) The anticlockwise rotation of an LC molecule towards the white state in the driving field from underneath; (b) the clockwise rotation towards black in an impulse of the E -field from above (relaxation)Figure 14.47 (a) The conventional FFS, (b) the undershoot switching and (c) the CFFS. This figure was reproduced from Li, Y. et al., JSID 08 , p. 1071 with permission by the Journal of the Society for Information DisplayFigure 14.48 The decay of luminance to zero for the regular FFS (curve 1) and for CFFS (curve 2)Figure 14.49 The decay from a 100 percent to a 50 percent luminance for the three addressing modes in Figure 14.47: curve 1 for FFS, curve 2 for undershoot switching and curve 3 for CFFS. This figure was reproduced from Li, Y. et al., JSID 08 , p. 1072 with permission by the Journal of the Society for Information DisplayFigure 14.50 The decay of luminance from 50 percent to 10 percent for the three addressing modes in Figure 14.49Figure 14.51 Addressing of two subpixels with a two capacitor charge sharing circuit (CS-S-PVA). This figure was reproduced from Park, S. B. et al., SID 07 , p. 1252 with permission by The Society for Information DisplayFigure 14.52 Addressing of two subpixels with a one-capacitor charge sharing circuit (CS-PVA)Figure 14.53 Addressing of an array by charge sharing. This figure was reproduced from Kim, S. S., SID 08 , p. 197 with permission by The Society for Information DisplayFigure 14.54 Cross-section of a BVA display. This figure was reproduced from Shih, P. S. et al., SID 06 , p. 1067 with permission by The Society for Information DisplayFigure 14.55 The minimum bias voltage required in the BVA mode versus the pixel voltage. This figure was reproduced from Shih, P. S. et al., SID 06 , p. 1067 with permission by The Society for Information DisplayFigure 14.56 Cross-section of a BVA display with a stacked bias electrode. This figure was reproduced from Shih, P. S. et al., SID 06 , p. 1069 with permission by The Society for Information DisplayFigure 14.57 Transmittance versus pixel voltage V pof a BVA cell. This figure was reproduced from Shih, P. S. et al., SID 06 , p. 1068 with permission by The Society for Information DisplayFigure 14.58 Addressing circuit of a BVA cell and dot inversion. This figure was reproduced from Shih P.S. et al. SID 06, p. 1068 with permission by The Society for Information DisplayFigure 14.59 The delayed 10 percent to 90 percent (a) rise and (b) fall of luminance L versus time as a response to a stepwise stimulus (mostly voltage) at an LCDFigure 14.60 Blurred edge width (BEW) of a moving stripe displayed on an LCDFigure 14.61 The smooth pursuit of a movement on an LCDFigure 14.62 The integration and averaging of luminance along the path of smooth pursuitFigure 14.63 The spatial response on the retina to a spatial rectangular impulse of width w and speed υ >; w displayed on an LCDFigure 14.64 The spatial response to a rectangular impulse of width w and speed υ < w Figure 14.65 The spatial response to a rectangular impulse of width w and speed υ presented with a flash of light of duration t 0with Figure 14.66 The spatial response to a rectangular impulse of width w and speed υ presented with a flash of light of duration t 0with , but t 0< T fFigure 14.67 The response V 0( x ) = L , the luminance on the retina of (a) a stripe moving with speed υ in a 60 Hz frame; (b) a stripe moving with speed υ /2 in a 120 Hz frame; (c) a stripe moving in a 120 Hz frame with a black frame inserted ( ν is measured as pixels/frame)Figure 14.68 The generation of a spatial response with artifacts between two moving images. This figure was reproduced from Mikoshiba, S. et al., SID 00 , p. 385 with permission by The Society for Information DisplayFigure 14.69 The colour break-up in two pixels of width d with different colours moving at speed υ . This figure was reproduced from Mikoshiba, S. et al., SID 00 , p. 386 with permission by The Society for Information DisplayFigure 14.70 The reduction of artifacts and colour break-up by approximating a parallelogram realized by shifting pixels. This figure was reproduced from Mikoshiba, S. et al., SID 00 , p. 387 with permission by The Society for Information DisplayFigure 14.71 The edge enhancement by overdrive. This figure was reproduced from Kawabe, K. et al., SID 01 , p. 998 with permission by The Society for Information DisplayFigure 14.72 A light impulse extended into two frames and the integration limits for the integrals in Equation (14.109). This figure was reproduced from Becker, M. E., SID 08 , p.110 with permission by The Society for Information DisplayFigure 14.73 The block diagram for the calculation of the grey shade G″n replacing Gn by overshoot. This figure was reproduced from Lee, B. W. et al., SID 06 , p. 1802 with permission by The Society for Information DisplayFigure 14.74 Luminance reached starting from different levels of black. This figure was reproduced from Kim, T. et al., SID 06 , p. 1794 with permission by The Society for Information DisplayFigure 14.75 White level and contrast reached depending on the grey level of the black insertion. This figure was reproduced from Kim, T. et al., SID 06 , p. 1795 with permission by The Society for Information DisplayFigure 14.76 The positions of a stripe of backlight with respect to the transient of the luminance (pixel response): (a) just before the start of the luminance, (b) in the rising flank of the luminance and (c) in the falling flank of the luminance. This figure was reproduced from Sluyterman, A. A. S. and Boonekamp, B. E., SID 05 , p. 997 with permission by The Society for Information DisplayFigure 14.77 The ideal position of the scanning backlight at the start of the steady state of the luminance in each row. This figure was reproduced from Sluyterman, A. A. S. and Boonekamp, B.E., SID 05 , p. 998 with permission by The Society for Information DisplayFigure 14.78 The still perceivable cycles per degree (cpd) of an object moving with speed in degrees/s. This figure was reproduced from Kuroki, Y. et al., SID 06 , p. 14 with permission by The Society for Information DisplayFigure 14.79 The still perceived cpd versus speed with a frame rate of a displayed image of 60 Hz and 24 Hz. This figure was reproduced from Kuroki, Y. et al., SID 06 , p. 14 with permission by The Society for Information DisplayFigure 14.80 Level of a no longer annoying BEW of various objects versus frame rate. This figure was reproduced from Kuroki, Y. et al., SID 06 , p. 16 with permission by The Society for Information DisplayFigure 14.81 (a) The function of the subframes A/A and A/B and (b) the waveform of the voltages at subpixel A and B. This figure was reproduced from Kim, T. et al., SID 06 , p. 1709 with permission by The Society for Information DisplayFigure 14.82 The transient of the luminance for different addressing schemes. This figure was reproduced from Kim, T. et al., JSID 08 , 16/1, p. 181 with permission by the Journal of the Society for Information DisplayFigure 14.83 The optical system consisting of an LCD and the human vision system (HVS).This figure was reproduced from Pan, H. et al., SID06 , p. 1704 with permission by The Society for Information DisplayFigure 14.84 Temporal impulse response h t( t ) of an ideal LCDFigure 14.85 Temporal step response a t( t ) of an ideal LCDFigure 14.86 Spatial impulse response of a moving picture on the retinaFigure 14.87 Spatial step response of a moving picture on the retina versus a spatial coordinate x and a temporal coordinate x/υ Figure 14.88 Optical step response of a pixel in an LCDFigure 14.89 The window of integration in Equation (14.131)Figure 14.90 The normalized luminance u s( x / v ) on the retina and the blurred edge time BETFigure 14.91 of g ( t ) in Figure 14.90Figure 14.92 The normalized responses u t( t ) of an LCD to the input functions g ( t ) in Figure 14.91Figure 14.93 The rectangle needed for the integration in Equation (14.136)Figure 14.94 Fourier-transform of curves in Figure 14.92Figure 14.95 Director field with angle Θ, coordinate z and voltage V as well as field E across the cellFigure 14.96 Waveform for fast addressingFigure 14.97 Blocks of rows for addressing with V band V dFigure 14.98 (a)–(d) Oscillograms of voltages and luminances for four values of V dusing two column voltagesFigure 14.99 The addressing circuit within a pixelFigure 14.100 (a)–(d) Oscillograms of voltages and luminances for four values of V dusing a circuit within a pixel