Digital Forensics and Internet of Things

5 Chapter 5Figure 5.1 Describes the subdomains of AI forensics [S].Figure 5.2 AI in GPS navigation.Figure 5.3 Challenges on implication of AI.

6 Chapter 6Figure 6.1 Model explaining the interrelation of mobility forensics with mobile ...Figure 6.2 Diagrammatic representation of internal structure of smart devices.Figure 6.3 (a) The email says “referring email id that Rs. 5,000,000 loan amount...Figure 6.4 Common model explaining the process of forensic investigation for IoT...Figure 6.5 Factors related to the IoT mobility forensics.Figure 6.6 Model explaining drawback of internet of things in forensics.

7 Chapter 7Figure 7.1 IoT architecture to understand data flow.Figure 7.2 The loopholes of the IoT ecosystem.Figure 7.3 Mixture of three digital scientific schemes which helps in understand...Figure 7.4 IoT Forensics requires a multi-faceted approach where demonstration c...

8 Chapter 8Figure 8.1 IoT sensors over business objectives.Figure 8.2 Encryption and decryption process.Figure 8.3 Symmetric encryption.Figure 8.4 Asymmetric encryption.

9 Chapter 9Figure 9.1 Xilinx counter IP core.Figure 9.2 Binary counter IP core.Figure 9.3 RTL schematic of 8-bit down counter IP core.Figure 9.4 Binary counter IP core.Figure 9.5 RTL schematic of 16-bit up/down counter IP core.Figure 9.6 IP core generation wizard.Figure 9.7 Xilinx square root IP core.Figure 9.8 Square root IP core.Figure 9.9 Square root IP core.Figure 9.10 RTL view of 8-bit square root.Figure 9.11 RTL view of 8-bit square root.Figure 9.12 RTL view of 16-bit square root using IP core.Figure 9.13 RTL view of 8-bit multiplier.Figure 9.14 Simulation view of 8-bit multiplier.Figure 9.15 Xilinx multiplier IP core.Figure 9.16 Multiplier IP core.Figure 9.17 RTL schematic of 8-bit multiplier IP core.Figure 9.18 Eight-bit multiplier simulation using IP core.Figure 9.19 RTL view of 8-bit down counter.Figure 9.20 RTL schematic of 8-bit down counter IP core.Figure 9.21 Eight-bit down the counter simulation.Figure 9.22 Eight- bit down counter simulation using IP core.Figure 9.23 Sixteen- bit down counter simulation using IP core.Figure 9.24 Sixteen-bit up a counter simulation using IP core.Figure 9.25 Sixteen-bit down counter simulation using IP core.Figure 9.26 Eight-bit square root simulation.Figure 9.27 Eight-bit square root simulation using IP core.Figure 9.28 Square root simulation for a non-perfect square number using IP core...Figure 9.29 Sixteen-bit square root simulation using IP core.Figure 9.30 Graph of Spartan-3E synthesis report.Figure 9.31 Graph of Spartan-6 synthesis report.Figure 9.32 Sixteen-bit binary up/down counter-power report.

10 Chapter 10Figure 10.1 The Vinci’s knight [6].Figure 10.2 Shakey the robot [9].Figure 10.3 The sensory network.Figure 10.4 3T architecture.Figure 10.5 Types of the cognitive architectures.Figure 10.6 Kismet’s facial expressions [28].Figure 10.7 The TIAGo-based robot [40].Figure 10.8 TOMMY—the nurse [42].Figure 10.9 A four-legged robot spot in Singapore to comply to the rules of soci...

11 Chapter 11Figure 11.1 Clustering in VANET.Figure 11.2 Internet of vehicles.Figure 11.3 Components of the IoT forensics.

12 Chapter 12Figure 12.1 Cognitive radio network.Figure 12.2 Cognitive radio cellular network (full duplex).Figure 12.3 Secondary base station with full duplex antenna.

13 Chapter 13Figure 13.1 Block diagram.Figure 13.2 Fingerprint pattern recognition.Figure 13.3 Working of the circuit.Figure 13.4 Finger print do not matched.

1 Cover

2 Table of Contents

3 Title Page

4 Copyright

5 Preface

6 Begin Reading

7 About the Editors

8 Index

9 End User License Agreement

1 v

2 ii

3 iii

4 iv

5 xiii

6 xiv

7 1

8 2

9 3

10 4

11 5

12 6

13 7

14 8

15 9

16 10

17 11

18 12

19 13

20 14

21 15

22 16

23 17

24 18

25 19

26 20

27 21

28 22

29 23

30 24

31 25

32 26

33 27

34 28

35 29

36 30

37 31

38 32

39 33

40 34

41 35

42 36

43 37

44 38

45 39

46 40

47 41

48 42

49 43

50 45

51 46

52 47

53 48

54 49

55 50

56 51

57 52

58 53

59 54

60 55

61 56

62 57

63 58

64 59

65 60

66 61

67 62

68 63

69 64

70 65

71 66

72 67

73 68

74 69

75 70

76 71

77 73

78 74

79 75

80 76

81 77

82 78

83 79

84 80

85 81

86 82

87 83

88 84

89 85

90 86

91 87

92 88

93 89

94 90

95 91

96 92

97 93

98 94

99 95

100 96

101 97

102 98

103 99

104 100

105 101

106 102

107 103

108 104

109 105

110 106

111 107

112 108

113 109

114 110

115 111

116 112

117 113

118 114

119 115

120 116

121 117

122 118

123 119

124 120

125 121

126 122

127 123

128 124

129 125

130 126

131 127

132 128

133 129

134 131

135 132

136 133

137 134

138 135

139 136

140 137

141 138

142 139

143 140

144 141

145 142

146 143

147 144

148 145

149 146

150 147

151 148

152 149

153 150

154 151

155 152

156 153

157 154

158 155

159 156

160 157

161 158

162 159

163 160

164 161

165 162

166 163

167 164

168 165

169 166

170 167

171 168

172 169

173 170

174 171

175 172

176 173

177 174

178 175

179 176

180 177

181 178

182 179

183 180

184 181

185 182

186 183

187 184

188 185

189 186

190 187

191 188

192 189

193 190

194 191

195 192

196 193

197 194

198 195

199 196

200 197

201 199

202 200

203 201

204 202

205 203

206 204

207 205

208 206

209 207

210 208

211 209

212 211

213 212

214 213

215 214

216 215

217 216

218 217

219 218

220 219

221 220

222 221

223 222

224 223

225 224

226 225

227 227

228 228

229 229

230 230

231 231

232 232

233 233

234 234

235 235

236 237

237 238

238 239

239 240

240 241

241 242

242 243

243 244

244 245

245 246

246 247

247 248

248 249

249 250

250 251

251 252

252 253

253 254

254 255

255 256

256 257

257 258

258 259

259 260

260 261

261 262

262 263

263 264

264 265

265 266

266 267

267 268

268 269

269 270

270 271

271 272

Scrivener Publishing

100 Cummings Center, Suite 541J

Beverly, MA 01915-6106

Publishers at Scrivener

Martin Scrivener ( martin@scrivenerpublishing.com)

Phillip Carmical ( pcarmical@scrivenerpublishing.com)

Edited by

Anita Gehlot

Uttaranchal Institute of Technology, Uttaranchal University, India

Rajesh Singh

Uttaranchal Institute of Technology, Uttaranchal University, India

Читать дальше