Christopher Hallinan - Embedded Linux Primer - A Practical, Real-World Approach

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Embedded Linux Primer: A Practical, Real-World Approach: краткое содержание, описание и аннотация

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Comprehensive Real-World Guidance for Every Embedded Developer and Engineer
This book brings together indispensable knowledge for building efficient, high-value, Linux-based embedded products: information that has never been assembled in one place before. Drawing on years of experience as an embedded Linux consultant and field application engineer, Christopher Hallinan offers solutions for the specific technical issues you're most likely to face, demonstrates how to build an effective embedded Linux environment, and shows how to use it as productively as possible.
Hallinan begins by touring a typical Linux-based embedded system, introducing key concepts and components, and calling attention to differences between Linux and traditional embedded environments. Writing from the embedded developer's viewpoint, he thoroughly addresses issues ranging from kernel building and initialization to bootloaders, device drivers to file systems.
Hallinan thoroughly covers the increasingly popular BusyBox utilities; presents a step-by-step walkthrough of porting Linux to custom boards; and introduces real-time configuration via CONFIG_RT--one of today's most exciting developments in embedded Linux. You'll find especially detailed coverage of using development tools to analyze and debug embedded systems--including the art of kernel debugging.
• Compare leading embedded Linux processors
• Understand the details of the Linux kernel initialization process
• Learn about the special role of bootloaders in embedded Linux systems, with specific emphasis on U-Boot
• Use embedded Linux file systems, including JFFS2--with detailed guidelines for building Flash-resident file system images
• Understand the Memory Technology Devices subsystem for flash (and other) memory devices
• Master gdb, KGDB, and hardware JTAG debugging
• Learn many tips and techniques for debugging within the Linux kernel
• Maximize your productivity in cross-development environments
• Prepare your entire development environment, including TFTP, DHCP, and NFS target servers
• Configure, build, and initialize BusyBox to support your unique requirements

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Table 3-3 summarizes a small sampling of the PQ I product line.

Table 3-3. Freescale Select PowerQUICC I Highlights

Feature MPC850 MPC860 MPC875 MPC885
Core/speeds PowerPC 8xx PowerPC 8xx PowerPC 8xx PowerPC 8xx
Up to 80MHz Up to 80MHz Up to 133MHz Up to 133MHz
DRAM controller Y Y Y Y
USB Y N Y Y
SPI controller Y Y Y Y
I 2C controller Y Y Y Y
SCC controllers 2 4 1 3
SMC controllers 2 2 1 1
Security engine N N Y Y
Dedicated Fast Ethernet controller N N 2 2

The next step up in the Freescale PowerPC product line is PowerQUICC II. PQ II incorporates the company's G2 PowerPC core derived from the 603e embedded PowerPC core. These integrated communications processors operate at 133-450MHz and feature multiple 10/100Mbps Ethernet interfaces, security engines, and ATM and PCI support, among many others. The PQ II encompasses the MPC82xx products.

PQ II adds two new types of controllers to the QUICC engine. The FCC is a full-duplex fast serial communications controller. The FCC supports high-speed communications such as 100Mbps Ethernet and T3/E3 up to 45Mbps. The MCC is a multichannel controller capable of 128KB x 64KB channelized data.

Table 3-4 summarizes the highlights of selected PowerQUICC II processors.

Table 3-4. Freescale Select PowerQUICC II Highlights

Feature MPC8250 MPC8260 MPC8272 MPC8280
Core/speeds G2/603e 150-200MHz G2/603e 100-300MHz G2/603e 266-400MHz G2/603e 266-400MHz
DRAM controller Y Y Y Y
USB N N Y Via SCC4
SPI controller Y Y Y Y
I 2C controller Y Y Y Y
SCC controllers 4 4 3 4
SMC controllers 2 2 2 2
FCC controllers 3 3 2 3
MCC controllers 1 2 0 2

Based on the Freescale PowerPC e300 core (evolved from the G2/603e), the PowerQUICC II Pro family operates at 266-667MHz and features support for Gigabit Ethernet, dual data rate (DDR) SDRAM controllers, PCI, high-speed USB, security acceleration, and more. These are the MPC83xx family of processors. The PQ II and PQ II Pro families of processors have been designed into a wide variety of equipment, such as LAN and WAN switches, hubs and gateways, PBX systems, and many other systems with similar complexity and performance requirements.

The PowerQUICC II Pro contains three family members without the QUICC engine, and two that are based on an updated version of the QUICC engine. The MPC8358E and MPC8360E both add a new Universal Communications Controller, which supports a variety of protocols.

Table 3-5 summarizes the highlights of select members of the PQ II Pro family.

Table 3-5. Freescale Select PowerQUICC II Pro Highlights
Feature MPC8343E MPC8347E MPC8349E MPC8360E
Core/speeds e300 266-400MHz e300 266-667MHz e300 400-667MHz e300 266-667MHz
DRAM controller Y-DDR Y-DDR Y-DDR Y-DDR
USB Y 2 2 Y
SPI controller Y Y Y Y
I 2C controller 2 2 2 2
Ethernet 10/100/1000 2 2 2 Via UCC
UART 2 2 2 2
PCI controller Y Y Y Y
Security engine Y Y Y Y
MCC 0 0 0 1
UCC 0 0 0 8

At the top of the PowerQUICC family are the PQ III processors. These operate between 600MHz and 1.5GHz. They are based on the e500 core and support Gigabit Ethernet, DDR SDRAM, RapidIO, PCI and PCI/X, ATM, HDLC, and more. This family incorporates the MPC85xx product line. These processors have found their way into high-end products such as wireless base station controllers, optical edge switches, central office switches, and similar equipment.

Table 3-6 highlights some of the PQ III family members.

Table 3-6. Freescale Select PowerQUICC III Highlights
Feature MPC8540 MPC8548E MPC8555E MPC8560
Core/speeds e500 Up to 1.0GHz e500 Up to 1.5GHz e500 Up to 1.0GHz e500 Up to 1.0GHz
DRAM controller Y-DDR Y-DDR Y-DDR Y-DDR
USB N N Via SCC N
SPI controller N N Y Y
I 2C controller Y Y Y Y
Ethernet 10/100 1 Via GigE Via SCC Via SCC
Gigabit Ethernet 2 4 2 2
UART 2 2 2 Via SCC
PCI controller PCI/PCI-X PCI/PCI-X PCI PCI/PCI-X
Rapid IO Y Y N Y
Security engine N Y Y N
SCC 3 4
FCC 2 3
SMC 2 0
MCC 0 2

3.2.4. MIPS

You might be surprised to learn that 32-bit processors based on the MIPS architecture have been shipping for more than 20 years. The MIPS architecture was designed in 1981 by a Stanford University engineering team led by Dr. John Hennessey, who later went on to form MIPS Computer Systems, Inc. That company has morphed into the present-day MIPS Technologies, whose primary role is the design and subsequent licensing of MIPS architecture and cores.

The MIPS core has been licensed by many companies, several of which have become powerhouses in the embedded processor market. MIPS is a Reduced Instruction Set Computing (RISC) architecture with both 32-bit and 64-bit implementations shipping in many popular products. MIPS processors are found in a large variety of products, from high-end to consumer devices. It is public knowledge that MIPS processors power many popular well-known consumer products, such as Sony high definition television sets, Linksys wireless access points, and the popular Sony PlayStation 2 game console. [21] Source: www.mips.com/content/PressRoom/PressReleases/2003-12-22

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