Christopher Hallinan: Embedded Linux Primer: A Practical, Real-World Approach

• On-chip dual-data-rate (DDR) SDRAM controller

• Integrated NAND Flash controller

• PCI bus interface

• Dual 10/100Mbps Ethernet ports

• On-chip USB 2.0 interface

• Up to four user-configurable serial ports

• Dual I 2C controllers

• Programmable Interrupt Controller

• Serial Peripheral Interface (SPI) controller

• Programmable timers

• JTAG interface for debugging

This is indeed a complete system on chip (SOC). Figure 3-2 is a block diagram of the AMCC PowerPC 440EP Embedded Processor. With the addition of memory chips and physical I/O hardware, a complete high-end embedded system can be built around this integrated microprocessor with minimal interface circuitry required.

Figure 3-2. AMCC PPC 440EP Embedded Processor (Courtesy AMCC Corporation)

Many manufacturers offer reference hardware platforms to enable a developer to explore the capabilities of the processor or other hardware. The examples later in this book (Chapters 14, "Kernel Debugging Techniques"; and 15, "Debugging Embedded Linux Applications") were executed on the AMCC Yosemite board, which is the company's reference platform containing the 440EP shown in Figure 3-2.

Numerous product configurations are available with PowerPC processors. As demonstrated in Figure 3-2, the AMCC 440EP contains sufficient I/O interfaces for many common products, with very little additional circuitry. Because this processor contains an integrated floating-point unit (FPU), it is ideally suited for products such as network-attached imaging systems, general industrial control, and networking equipment.

AMCC's PowerPC product lineup includes several configurations powered by two proven cores. Their 405 core products are available in configurations with and without Ethernet controllers. All 405 core configurations include integrated SDRAM controllers, dual UARTs for serial ports, I 2C for low-level onboard management communications, general-purpose I/O pins, and integral timers. The AMCC 405 core integrated processors provide economical performance on a proven core for a wide range of applications that do not require a hardware FPU.

The AMCC 440-based core products raise the performance level and add peripherals. The 440EP featured in some of our examples includes a hardware FPU. The 440GX adds two triple-speed 10/100/1000MB Ethernet interfaces (in addition to the two 10/100Mbps Ethernet ports) and TCP/IP hardware acceleration for high-performance networking applications. The 440SP adds hardware acceleration for RAID 5/6 applications. All these processors have mature Linux support. Table 3-1 summarizes the highlights of the AMCC 405xx family.

Table 3-1. AMCC PowerPC 405xx Highlights Summary

See the AMCC website, at www.amcc.com/embedded, for complete details.

Table 3-2 summarizes the features of the AMCC 440xx family of processors.

Table 3-2. AMCC PowerPC 440xx Highlights Summary

Freescale Semiconductor has a large range of PowerPC processors with integrated peripherals. The manufacturer is currently advertising its PowerPC product portfolio centered on three broad vertical-market segments: networking, automotive, and industrial. Freescale PowerPC processors have enjoyed enormous success in the networking market segment. This lineup of processors has wide appeal in a large variety of network equipment, from the low end to the high end of the product space.

In a recent press release, Freescale Semiconductor announced that it had shipped more than 200 million integrated communications processors. [20] On the Freescale website, navigate to Media Center, Press Releases. This one was dated 10/31/2005 from Austin, Texas. Part of this success is based around the company's PowerQUICC product line. The PowerQUICC architecture has been shipping for more than a decade. It is based on a PowerPC core integrated with a QUICC engine (also called a communications processor module or CPM in the Freescale literature). The QUICC engine is an independent RISC processor designed to offload the communications processing from the main PowerPC core, thus freeing up the PowerPC core to focus on control and management applications. The QUICC engine is a complex but highly flexible communications peripheral controller.

[5]In its current incarnation, PowerQUICC encompasses four general families. For convenience, as we discuss these PowerQUICC products, we refer to it as PQ.

The PQ I family includes the original PowerPC-based PowerQUICC implementations and consists of the MPC8xx family of processors. These integrated communications processors operate at 50-133MHz and feature the embedded PowerPC 8xx core. The PQ I family has been used for ATM and Ethernet edge devices such as routers for the home and small office (SOHO) market, residential gateways, ASDL and cable modems, and similar applications.

The CPM or QUICC engine incorporates two unique and powerful communications controllers. The Serial Communication Controller (SCC) is a flexible serial interface capable of implementing many serial-based communications protocols, including Ethernet, HDLC/SDLC, AppleTalk, synchronous and asynchronous UARTs, IrDA, and other bit stream data.

The Serial Management Controller (SMC) is a module capable of similar serial-communications protocols, and includes support for ISDN, serial UART, and SPI protocols.

Using a combination of these SCCs and SMCs, it is possible to create very flexible I/O combinations. An internal time-division multiplexer even allows these interfaces to implement channelized communications such as T1 and E1 I/O.